Sign In | Join Free | My burrillandco.com
Home > SFP Optical Transceiver Module >

40GBASE - LR4 SFP Optical Transceiver Module Single Mode Fiber 4 CWDM Lanes

    Buy cheap 40GBASE - LR4 SFP Optical Transceiver Module Single Mode Fiber 4 CWDM Lanes from wholesalers
     
    Buy cheap 40GBASE - LR4 SFP Optical Transceiver Module Single Mode Fiber 4 CWDM Lanes from wholesalers
    • Buy cheap 40GBASE - LR4 SFP Optical Transceiver Module Single Mode Fiber 4 CWDM Lanes from wholesalers

    40GBASE - LR4 SFP Optical Transceiver Module Single Mode Fiber 4 CWDM Lanes

    Ask Lasest Price
    Brand Name : E-link China
    Model Number : LNK-QSFP-LR
    Certification : CE, RoHS, FCC
    Payment Terms : T/T, Western Union, MoneyGram, Paypal
    Supply Ability : 1000000000pcs/Month
    Delivery Time : 3-5 working days
    Price : Negotiation
    • Product Details
    • Company Profile

    40GBASE - LR4 SFP Optical Transceiver Module Single Mode Fiber 4 CWDM Lanes

    40GBASE-LR4 4 CWDM lanes 1310 nm SMF 10km SFP Optical Transceiver Module


    PRODUCT FEATURES

    • 4 CWDM lanes Mux/Demux design
    • Up to 11.1Gbps Data rate per wavelength
    • Up to 10km transmission on SMF
    • Electrically hot-pluggable
    • Digital Diagnostics Monitoring Interface
    • Compliant with QSFP+ MSA with LC connector
    • Case operating temperature range:0°C to 70°C
    • Power dissipation < 3.5 W

    APPLICATIONS

    • 40G Ethernet
    • Data Center and LAN

    STANDARD

    • Compliant to IEEE 802.3ba
    • Compliant to SFF-8436
    • RoHS Compliant.

    General Description

    E-LINK QSFP+ LR4 is designed to operate over single-mode fiber system using 4X10 CWDM channel in 1310 band and links up to 10km. The module converts 4 inputs channel of 10Gb/s electrical data to 4 CWDM optical signals, and multiplexes them into a single channel for 40Gb/s optical transmission. Reversely, on the receiver side, the module optically de-multiplexes a 40Gb/s input into 4 CWDM channels signals, and converts them to 4 channel output electrical data.

    The central wavelengths of the 4 CWDM channels are 1271, 1291, 1311 and 1331 nm. It contains a duplex LC connector for the optical interface and a 38-pin connector for the electrical interface. Single-mode fiber (SMF) is applied in this module. This product converts the 4-channel 10Gb/s electrical input data into CWDM optical signals (light), by a 4-wavelength Distributed Feedback Laser (DFB) array. The 4 wavelengths are multiplexed into a single 40Gb/s data, propagating out of the transmitter module via the SMF. The receiver module accepts the 40Gb/s optical signals input, and de-multiplexes it into 4 CWDM 10Gb/s channels. Each wavelength light is collected by a discrete photo diode, and then outputted as electric data after amplified by a TIA.

    The product is designed with form factor, optical/electrical connection and digital diagnostic interface according to the QSFP+ Multi-Source Agreement (MSA) and compliant to 40G QSFP+ LR4 of IEEE 802.3ba.


    Absolute Maximum Ratings

    ParameterSymbolMin.Typ.Max.UnitNote
    Storage TemperatureTs-40-85ºC
    Relative HumidityRH5-95%
    Power Supply VoltageVCC-0.3-4V
    Signal Input VoltageVcc-0.3-Vcc+0.3V

    Recommended Operating Conditions

    ParameterSymbolMin.Typ.Max.UnitNote
    Case Operating TemperatureTcase0-70ºCWithout air flow
    Power Supply VoltageVCC3.133.33.47V
    Power Supply CurrentICC-900mA
    Data RateBR10.3125GbpsEach channel
    Transmission DistanceTD-10km
    Coupled fiberSingle mode fiber9/125um SMF

    Optical Characteristics

    ParameterSymbolMinTypMaxUnitNOTE
    Transmitter
    Wavelength Assignmentλ01264.512711277.5nm
    λ11284.512911297.5nm
    λ21304.513111317.5nm
    λ31324.513311337.5nm
    Total Output. PowerPOUT8.3dBm
    Average Launch Power Per lane-72.3dBm
    Spectral Width (-20dB)σ1nm
    SMSR30dB
    Optical Extinction RatioER3.5dB
    Average launch Power off per lanePoff-30dBm
    Transmitter and Dispersion PeanltyTDP2.3dB
    RINRIN-128dB/Hz
    Output Eye MaskCompliant with IEEE 802.3ba
    Receiver
    Rx Sensitivity per lane(OMA)RSENS-11.5dBm1
    Input Saturation Power (Overload)Psat3.3dBm
    Receiver ReflectanceRr-26dB

    Notes:

    1. Measured with a PRBS 231-1 test pattern, @10.325Gb/s, BER<10-12 .
      1. Electrical Characteristics
    ParameterSymbolMinTypMaxUnitNOTE
    Supply VoltageVcc3.143.33.46V
    Supply CurrentIcc900mA
    Transmitter
    Input differential impedanceRin100Ω1
    Differential data input swingVin,pp1801000mV
    Transmit Disable VoltageVDVcc–1.3VccV
    Transmit Enable VoltageVENVeeVee+ 0.8V2
    Transmit Disable Assert Time10us
    Receiver
    Differential data output swingVout,pp300850mV3
    Data output rise timetr28ps4
    Data output fall timetf28ps4
    LOS FaultVLOS faultVcc–1.3VccHOSTV5
    LOS NormalVLOS normVeeVee+0.8V5
    Power Supply RejectionPSR100mVpp6

    Notes:

    1. Connected directly to TX data input pins. AC coupled thereafter.
    2. Or open circuit.
    3. Into 100 ohms differential termination.
    4. 20 – 80 %.
    5. Loss Of Signal is LVTTL. Logic 0 indicates normal operation; logic 1 indicates no signal detected.
    6. Receiver sensitivity is compliant with power supply sinusoidal modulation of 20 Hz to 1.5 MHz up to specified value applied through the recommended power supply filtering network.

    Figure 1---Pin out of Connector Block on Host Board


    PinSymbolName/DescriptionNOTE
    1GNDTransmitter Ground (Common with Receiver Ground)1
    2Tx2nTransmitter Inverted Data Input
    3Tx2pTransmitter Non-Inverted Data output
    4GNDTransmitter Ground (Common with Receiver Ground)1
    5Tx4nTransmitter Inverted Data Input
    6Tx4pTransmitter Non-Inverted Data output
    7GNDTransmitter Ground (Common with Receiver Ground)1
    8ModSelLModule Select
    9ResetLModule Reset
    10VccRx3.3V Power Supply Receiver2
    11SCL2-Wire serial Interface Clock
    12SDA2-Wire serial Interface Data
    13GNDTransmitter Ground (Common with Receiver Ground)
    14Rx3pReceiver Non-Inverted Data Output
    15Rx3nReceiver Inverted Data Output
    16GNDTransmitter Ground (Common with Receiver Ground)1
    17Rx1pReceiver Non-Inverted Data Output
    18Rx1nReceiver Inverted Data Output
    19GNDTransmitter Ground (Common with Receiver Ground)1
    20GNDTransmitter Ground (Common with Receiver Ground)1
    21Rx2nReceiver Inverted Data Output
    22Rx2pReceiver Non-Inverted Data Output
    23GNDTransmitter Ground (Common with Receiver Ground)1
    24Rx4nReceiver Inverted Data Output1
    25Rx4pReceiver Non-Inverted Data Output
    26GNDTransmitter Ground (Common with Receiver Ground)1
    27ModPrslModule Present
    28IntLInterrupt
    29VccTx3.3V power supply transmitter2
    30Vcc13.3V power supply2
    31LPModeLow Power Mode
    32GNDTransmitter Ground (Common with Receiver Ground)1
    33Tx3pTransmitter Non-Inverted Data Input
    34Tx3nTransmitter Inverted Data Output
    35GNDTransmitter Ground (Common with Receiver Ground)1
    36Tx1pTransmitter Non-Inverted Data Input
    37Tx1nTransmitter Inverted Data Output
    38GNDTransmitter Ground (Common with Receiver Ground)1

    Notes:

    1. GND is the symbol for signal and supply (power) common for QSFP+ modules. All are common within the QSFP+ module and all module voltages are referenced to this potential unless otherwise noted. Connect these directly to the host board signal common ground plane.

    2. VccRx, Vcc1 and VccTx are the receiving and transmission power suppliers and shall be applied concurrently. Recommended host board power supply filtering is shown below. Vcc Rx, Vcc1 and Vcc Tx may be internally connected within the QSFP+ transceiver module in any combination. The connector pins are each rated for a maximum current of 500mA.


    1. Digital Diagnostic Functions

    E-LINK LNK-QSFP-LR support the 2-wire serial communication protocol as defined in the QSFP+ MSA. which allows real-time access to the following operating parameters:

    • Transceiver temperature
    • Laser bias current
    • Transmitted optical power
    • Received optical power
    • Transceiver supply voltage

    It also provides a sophisticated system of alarm and warning flags, which may be used to alert end-users when particular operating parameters are outside of a factory-set normal range.

    The operating and diagnostics information is monitored and reported by a Digital Diagnostics Transceiver Controller (DDTC) inside the transceiver, which is accessed through the 2-wire serial interface. When the serial protocol is activated, the serial clock signal (SCL pin) is generated by the host. The positive edge clocks data into the QSFP+ transceiver into those segments of its memory map that are not write-protected. The negative edge clocks data from the QSFP+ transceiver. The serial data signal (SDA pin) is bi-directional for serial data transfer. The host uses SDA in conjunction with SCL to mark the start and end of serial protocol activation. The memories are organized as a series of 8-bit data words that can be addressed individually or sequentially. The 2-wire serial interface provides sequential or random access to the 8 bit parameters, addressed from 000h to the maximum address of the memory.

    This clause defines the Memory Map for QSFP transceiver used for serial ID, digital monitoring and certain control functions. The interface is mandatory for all QSFP devices. The memory map has been changed in order to accommodate 4 optical channels and limit the required memory space. The structure of the memory is shown in The memory space is arranged into a lower, single page, address space of 128 bytes and multiple upper address space pages. This structure permits timely access to addresses in the lower page, e.g. Interrupt Flags and Monitors. Less time critical entries, e.g. serial ID information and threshold settings, are available with the Page Select function. The structure also provides address expansion by adding additional upper pages as needed. For example, in upper pages 01 and 02 are optional. Upper page 01 allows implementation of Application Select Table, and upper page 02 provides user read/write space. The lower page and upper pages 00 and 03 are always implemented. The interface address used is A0xh and is mainly used for time critical data like interrupt handling in order to enable a “one-time-read” for all data related to an interrupt situation. After an Interrupt, IntL, has been asserted, the host can read out the flag field to determine the effected channel and type of flag.

    For more detailed information including memory map definitions, please see the QSFP+ MSA Specification.


    Quality 40GBASE - LR4 SFP Optical Transceiver Module Single Mode Fiber 4 CWDM Lanes for sale
    Inquiry Cart 0
    Send your message to this supplier
     
    *From:
    *To: E-link China Technology Co., Ltd.
    *Subject:
    *Message:
    Characters Remaining: (0/3000)